Invention Grant
- Patent Title: Interlayer dielectric layer
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Application No.: US16138106Application Date: 2018-09-21
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Publication No.: US11749563B2Publication Date: 2023-09-05
- Inventor: Joung-Wei Liou , Yi-Wei Chiu , Bo-Jhih Shen
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Sterne, Kessler, Goldstein & Fox P.L.L.C.
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/532

Abstract:
The present disclosure describes a method for forming a silicon-based, carbon-rich, low-k ILD layer with a carbon concentration between about 15 atomic % and about 20 atomic %. For example, the method includes depositing a dielectric layer, over a substrate, with a dielectric material having a dielectric constant below 3.9 and a carbon atomic concentration between about 15% and about 20%; exposing the dielectric layer to a thermal process configured to outgas the dielectric material; etching the dielectric layer to form openings; and filling the openings with a conductive material to form conductive structures.
Public/Granted literature
- US20200006126A1 INTERLAYER DIELECTRIC LAYER Public/Granted day:2020-01-02
Information query
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