Techniques for error detection involve injecting, to a switch of a storage system, information representing an error of at least one device to be tested of the system, such that the information representing the error is passed from an upstream port of the switch to a computing device connected with the switch, the switch being connected to the at least one device to be tested via a downstream port. The techniques further involve obtaining a handling result of the computing device on the information representing the error, and determining an error handling capability of the system at least partly by analyzing the handling result. Accordingly, slave storage devices of storage system nodes, connectors, the entire PCIe topology at the CPU level, and an NVMe bus can be tested, so that the entire logical path of the error handling can be tested, thereby improving performance and saving testing costs.