Invention Grant
- Patent Title: Methods of semiconductor device fabrication
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Application No.: US17490921Application Date: 2021-09-30
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Publication No.: US11672115B2Publication Date: 2023-06-06
- Inventor: Qiguang Wang , Gonglian Wu
- Applicant: Yangtze Memory Technologies Co., Ltd.
- Applicant Address: CN Wuhan
- Assignee: Yangtze Memory Technologies Co., Ltd.
- Current Assignee: Yangtze Memory Technologies Co., Ltd.
- Current Assignee Address: CN Wuhan
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: H01L21/82
- IPC: H01L21/82 ; G11C5/02

Abstract:
Aspects of the disclosure provide a semiconductor device including a string of transistors stacked in a vertical direction over a substrate of the semiconductor device having a channel structure extending in the vertical direction. The string of transistors includes a first substring arranged along a first portion of the channel structure, a second substring arranged along a second portion of the channel structure, and a third substring arranged along a third portion of the channel structure. The second substring is between the first and the third substrings. Gate structures of transistors in the first substring are separated by first insulating layers. Gate structures of transistors in the second substring are separated by second insulating layers. Gate structures of transistors in the third substring are separated by third insulating layers. A volumetric mass density of the second insulating layers is lower than a volumetric mass density of the third insulating layers.
Public/Granted literature
- US20220020760A1 METHODS OF SEMICONDUCTOR DEVICE FABRICATION Public/Granted day:2022-01-20
Information query
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