A semiconductor device including a substrate including first and second regions, a first transistor on the first region and including a first semiconductor pattern protruding from the first region; a first gate structure covering an upper surface and sidewall of the first semiconductor pattern; first source/drain layers on the first semiconductor pattern at opposite sides of the first gate structure, upper surfaces of the first source/drain layers being closer to the substrate than an uppermost surface of the first gate structure; and a second transistor on the second region and including a second semiconductor pattern protruding from the second region; a second gate structure covering a sidewall of the second semiconductor pattern; and a second source/drain layer under the second semiconductor pattern; and a third source/drain layer on the second semiconductor pattern, wherein the upper surface of the first region is lower than the upper surface of the second region.