A semiconductor package includes: a connection structure having first and second surface opposing each other and including a plurality of insulating layers, a plurality of redistribution layers, and a plurality of connection vias; at least one semiconductor chip on the first surface having connection pads electrically connected to the plurality of redistribution layers; an encapsulant on the first surface encapsulating the at least one semiconductor chip; and UBM layers including UBM pads on the second surface and UBM vias connecting a redistribution layer. At least one connection via adjacent to the first surface has a tapered structure narrowed toward the second surface, and the other connection vias and the UBM vias have a tapered structure narrowed toward the first surface.