Invention Grant
- Patent Title: Chip singulation method
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Application No.: US17951021Application Date: 2022-09-22
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Publication No.: US11646230B2Publication Date: 2023-05-09
- Inventor: Takeshi Harada , Hiroaki Ohta , Yoshihiro Matsushima
- Applicant: Nuvoton Technology Corporation Japan
- Applicant Address: JP Kyoto
- Assignee: NUVOTON TECHNOLOGY CORPORATION JAPAN
- Current Assignee: NUVOTON TECHNOLOGY CORPORATION JAPAN
- Current Assignee Address: JP Kyoto
- Agency: McDermott Will & Emery LLP
- Main IPC: H01L21/78
- IPC: H01L21/78 ; H01L21/268

Abstract:
A chip singulation method includes, in stated order: forming a surface supporting layer on an upper surface of a wafer; thinning the wafer from the undersurface to reduce the thickness to at most 30 μm; removing the surface supporting layer from the upper surface; forming a first metal layer and subsequently a second metal layer on the undersurface of the wafer; applying a dicing tape onto an undersurface of the second metal layer; applying, onto the upper surface of the wafer, a process of increasing hydrophilicity of a surface of the wafer; forming a water-soluble protective layer on the surface of the wafer; cutting the wafer, the first metal layer, and the second metal layer by irradiating a predetermined region of the upper surface of the wafer with a laser beam; and removing the water-soluble protective layer from the surface of the wafer using wash water.
Public/Granted literature
- US20230015582A1 CHIP SINGULATION METHOD Public/Granted day:2023-01-19
Information query
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