A method and an apparatus for testing a chip, as well as a storage medium, and a chip thereof are provided. The chip includes an operation module. The method includes receiving, via a first pin of the chip, a test control signal indicating a test type of the operation module; performing a first test for the operation module using a first test vector based on the test type; or performing a second test for the operation module using a second test vector, where the first test is a test for the memory included in the operation module and the second test is a test for the functional logic in included in the operation module.