Invention Grant
- Patent Title: Defect localization in embedded memory
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Application No.: US17179133Application Date: 2021-02-18
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Publication No.: US11639959B2Publication Date: 2023-05-02
- Inventor: Szu Huat (Wu Shifa) Goh , Yin Hong Chan , Boon Lian Yeoh , Lin Zhao , Man Hon Thor
- Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
- Current Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Ditthavong, Steiner & Mlotkowski
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G01R31/311

Abstract:
A system and method for defect localization in embedded memory are provided. Embodiments include a system including automated testing equipment (ATE) interfaced with a wafer probe including a diagnostic laser for stimulating a DUT with the diagnostic laser at a ROI. The ATE is configured to simultaneously perform a test run at a test location of the DUT with a test pattern during stimulation of the DUT. Failing compare vectors of a reference failure log of a defective device are stored. A first profile module is configured to generate a first 3D profile from each pixel of a reference image of the defective device. A second profile module is configured to generate a second 3D profile from each pixel of the ROI of the DUT. A cross-correlation module is configured to execute a pixel-by-pixel cross-correlation from the first and second 3D profiles and generate an intensity map corresponding to a level of correlation between the DUT and defective device.
Public/Granted literature
- US20210199715A1 DEFECT LOCALIZATION IN EMBEDDED MEMORY Public/Granted day:2021-07-01
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