Signal output circuit and circuit for outputting delayed signal
Abstract:
A signal output circuit and a circuit for outputting a delayed signal are provided. The signal output circuit includes: a first control subcircuit, configured to receive a first pulse signal and an input signal and output a first adjustment signal, a first preset edge of the first adjustment signal has a first delay relative to a rising edge of the input signal; a second control subcircuit configured to receive a second pulse signal and the input signal and output a second adjustment signal; and the signal output subcircuit is configured to receive the first adjustment signal and the second adjustment signal, and output a delayed output signal, a rising edge of the delayed output signal is generated according to the first preset edge of the first adjustment signal, and a falling edge of the delayed output signal is generated according to the second preset edge of the second adjustment signal.
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