Invention Grant
- Patent Title: Scribe structure for memory device
-
Application No.: US17237992Application Date: 2021-04-22
-
Publication No.: US11600578B2Publication Date: 2023-03-07
- Inventor: Hidenori Yamaguchi , Wataru Hoshino , Keizo Kawakita
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/544 ; H01L27/108

Abstract:
Apparatuses and methods for manufacturing chips are described. An example method includes: removing a first portion of a cover layer and at least one dielectric layer under the first portion of the cover layer in a cut region between chips to form a groove, and forming a support structure including a second portion of the cover layer and the at least one dielectric layer under the second portion of the cover layer in the cut region; removing a third portion of the cover layer in one of the chips and a portion of the at least one dielectric layer under the third portion of the cover layer to form an hole on the first chip; depositing a conductive layer to cover the cover layer and the hole; forming a conductive pillar on the conductive layer in the hole; and removing the conductive layer on the cover layer and an edge surface of the hole.
Public/Granted literature
- US20220344278A1 SCRIBE STRUCTURE FOR MEMORY DEVICE Public/Granted day:2022-10-27
Information query
IPC分类: