Invention Grant
- Patent Title: High performance interconnect
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Application No.: US17008363Application Date: 2020-08-31
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Publication No.: US11599497B2Publication Date: 2023-03-07
- Inventor: Zuoguo Wu , Debendra Das Sharma , Mohiuddin M. Mazumder , Jong-Ru Guo , Anupriya Sriramulu , Narasimha Lanka , Timothy Wig , Jeff Morriss
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Alliance IP, LLC
- Main IPC: G06F15/173
- IPC: G06F15/173 ; H01L23/522 ; H03K19/17736 ; G06F15/16 ; H01L21/768 ; G06F9/28

Abstract:
A device includes a receiver to receive one or more training sequences during a training of a link, where the link connects two devices. The device may include agent logic to determine, from the one or more training sequences, a number of extension devices on the link between the two devices, and determine that the number of extension devices exceeds a threshold number. The device may include a transmitter to send a plurality of clock compensation ordered sets on the link based on determining that the number of extension devices exceeds a threshold number.
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