An SRAM (static random access memory) includes a semiconductor substrate; a plurality of PD transistors, each including a first fin structure formed on the semiconductor substrate, a PD gate structure formed across the first fin structure and covering a portion of a top and sidewall surfaces of the first fin structure, and a first source/drain doped layer formed in the first fin structure on both sides of the PD gate structure; a plurality of adjacent transistors, each including a second fin structure formed on the semiconductor substrate and a second source/drain doped layer formed in the second fin structure; an isolation layer, formed on the semiconductor substrate; a fin sidewall film, formed on the isolation layer and covering sidewall surfaces of each PD gate structure; and a first PD dielectric layer, formed on the isolation layer and covering sidewall surfaces of the first source/drain doped layer.