Invention Grant
- Patent Title: Type III-V semiconductor substrate with monolithically integrated capacitor
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Application No.: US17196258Application Date: 2021-03-09
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Publication No.: US11545485B2Publication Date: 2023-01-03
- Inventor: Hyeongnam Kim , Mohamed Imam
- Applicant: Infineon Technologies Austria AG
- Applicant Address: AT Villach
- Assignee: Infineon Technologies Austria AG
- Current Assignee: Infineon Technologies Austria AG
- Current Assignee Address: AT Villach
- Agency: Murphy, Bilak & Homiller, PLLC
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L27/06

Abstract:
A semiconductor die includes a barrier layer of type III-V semiconductor material, a channel layer of type III-V semiconductor material disposed below the barrier layer, the channel layer forming a heterojunction with the barrier layer such that a two-dimensional charge carrier gas is disposed in the channel layer near the heterojunction, a high-electron mobility transistor disposed in a first lateral region of the semiconductor die, the high-electron mobility transistor comprising source and drain electrodes that each are in ohmic contact with the two-dimensional charge carrier gas and a gate structure that is configured to control a conductive connection between the source and drain electrodes, and a capacitor that is monolithically integrated into the semiconductor die and is disposed in a second lateral region of the semiconductor die, a dielectric medium of the capacitor includes a first section of the barrier layer.
Public/Granted literature
- US20220293589A1 Type III-V Semiconductor Substrate with Monolithically Integrated Capacitor Public/Granted day:2022-09-15
Information query
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