Invention Grant
- Patent Title: Manufacturing method of a semiconductor device with efficient edge structure
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Application No.: US17244393Application Date: 2021-04-29
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Publication No.: US11545362B2Publication Date: 2023-01-03
- Inventor: Edoardo Zanetti , Simone Rascuna' , Mario Giuseppe Saggio , Alfio Guarnera , Leonardo Fragapane , Cristina Tringali
- Applicant: STMICROELECTRONICS S.r.l.
- Applicant Address: IT Agrate Brianza
- Assignee: STMICROELECTRONICS S.r.l.
- Current Assignee: STMICROELECTRONICS S.r.l.
- Current Assignee Address: IT Agrate Brianza
- Agency: Seed Intellectual Property Law Group LLP
- Priority: IT102017000140373 20171205
- Main IPC: H01L29/16
- IPC: H01L29/16 ; H01L21/04 ; H01L21/285 ; H01L29/872 ; H01L29/66 ; H01L29/78 ; H01L29/06

Abstract:
A manufacturing method of an electronic device includes: forming a drift layer of an N type; forming a trench in the drift layer; forming an edge-termination structure alongside the trench by implanting dopant species of a P type; and forming a depression region between the trench and the edge-termination structure by digging the drift layer. The steps of forming the depression region and the trench are carried out at the same time. The step of forming the depression region comprises patterning the drift layer to form a structural connection with the edge-termination structure having a first slope, and the step of forming the trench comprises etching the drift layer to define side walls of the trench, which have a second slope steeper than the first slope.
Public/Granted literature
- US20210249268A1 MANUFACTURING METHOD OF A SEMICONDUCTOR DEVICE WITH EFFICIENT EDGE STRUCTURE Public/Granted day:2021-08-12
Information query
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