Invention Grant
- Patent Title: Decreasing physical secure erase times in solid state drives
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Application No.: US17185325Application Date: 2021-02-25
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Publication No.: US11543992B2Publication Date: 2023-01-03
- Inventor: Vinayak Bhat , Amiya Banerjee
- Applicant: Western Digital Technologies, Inc.
- Applicant Address: US CA San Jose
- Assignee: Western Digital Technologies, Inc.
- Current Assignee: Western Digital Technologies, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Rutan & Tucker, LLP
- Agent Ravi Mohan
- Main IPC: G06F3/06
- IPC: G06F3/06

Abstract:
Storage devices may be configured to desirably reduce the time required to perform a physical secure erase operation. The storage device includes a controller that is configured to direct the storage device to receive a physical secure erase command. The storage device can then identify the one or more blocks within the memory array for secure erasure based on the received physical secure erase command. For each block identified for erasure, the storage device further evaluates the block to determine the level type of cells within the block. In response to the cell level type being single-level, a single-cell erase command is issued to perform a single-level cell erase on the block. Conversely, in response to the cell level type being a higher-dimensional cell, a modified single-cell erase command to perform a modified single-level cell erase on the block is issued.
Public/Granted literature
- US20220179578A1 Decreasing Physical Secure Erase Times in Solid State Drives Public/Granted day:2022-06-09
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