Invention Grant
- Patent Title: Integrated circuitry, a method used in forming integrated circuitry, and a method used in forming a memory array comprising strings of memory cells
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Application No.: US16921641Application Date: 2020-07-06
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Publication No.: US11495610B2Publication Date: 2022-11-08
- Inventor: Collin Howder , Shyam Surthi , Matthew Thorum
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L27/11556
- IPC: H01L27/11556 ; H01L27/11519 ; H01L27/11582 ; H01L27/11565 ; H01L27/1157 ; H01L27/11524

Abstract:
A method used in forming a memory array comprising strings of memory cells comprises forming a stack comprising vertically-alternating first tiers and second tiers. The second tiers comprise doped silicon dioxide and the first tiers comprise a material other than doped silicon dioxide. The stack comprises laterally-spaced memory-block regions. Channel-material-string constructions extend through the first tiers and the second tiers in the memory-block regions. The doped silicon dioxide that is in the second tiers is etched selectively relative to said other material that is in the first tiers and selectively relative to and to expose an undoped silicon dioxide-comprising string of a charge-blocking material that is part of individual of the channel-material-string constructions. Structure independent of method is disclosed.
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