Invention Grant
- Patent Title: VIA structure and methods of forming the same
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Application No.: US17306626Application Date: 2021-05-03
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Publication No.: US11489115B2Publication Date: 2022-11-01
- Inventor: Wei-Chieh Huang , Jieh-Jang Chen , Feng-Jia Shiu , Chern-Yow Hsu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/3105
- IPC: H01L21/3105 ; H01L21/768 ; H01L45/00 ; H01L21/321 ; H01L21/311 ; H01L21/285 ; H01L27/24

Abstract:
A method includes providing a substrate having a conductive column, a dielectric layer over the conductive column, and a plurality of sacrificial blocks over the dielectric layer, the plurality of sacrificial blocks surrounding the conductive column from a top view; depositing a sacrificial layer covering the plurality of sacrificial blocks, the sacrificial layer having a dip directly above the conductive column; depositing a hard mask layer over the sacrificial layer; removing a portion of the hard mask layer from a bottom of the dip; etching the bottom of the dip using the hard mask layer as an etching mask, thereby exposing a top surface of the conductive column; and forming a conductive material inside the dip, the conductive material being in physical contact with the top surface of the conductive column.
Public/Granted literature
- US20210257548A1 VIA Structure and Methods of Forming the Same Public/Granted day:2021-08-19
Information query
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