Invention Grant
- Patent Title: Method of manufacturing semiconductor structure having word line disposed over portion of an oxide-free dielectric material in the non-active region
-
Application No.: US17371119Application Date: 2021-07-09
-
Publication No.: US11488964B2Publication Date: 2022-11-01
- Inventor: Ching-Chia Huang , Wei-Ming Liao
- Applicant: NANYA TECHNOLOGY CORPORATION
- Applicant Address: TW New Taipei
- Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee Address: TW New Taipei
- Agency: CKC & Partners Co., LLC
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L27/108

Abstract:
A method of manufacturing a semiconductor structure includes: receiving a substrate having an active region and a non-active region adjacent to the active region; forming an etch stop layer over the non-active region of the substrate, in which the etch stop layer is oxide-free; forming an isolation over the etch stop layer; removing a portion of the active region and a portion of the isolation to form a first trench in the active region and a second trench over the etch stop layer, respectively, in which a thickness of the etch stop layer beneath the second trench is greater than a depth difference between the first trench and the second trench; forming a dielectric layer in the first trench; and filling a conductive material on the dielectric layer in the first trench and in the second trench. A semiconductor structure is also provided.
Public/Granted literature
- US20210335794A1 METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE Public/Granted day:2021-10-28
Information query
IPC分类: