Invention Grant
- Patent Title: Semiconductor package with leadframe interconnection structure
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Application No.: US17095947Application Date: 2020-11-12
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Publication No.: US11444011B2Publication Date: 2022-09-13
- Inventor: Woon Yik Yong , Andreas Kucher , Chia-Yen Lee , Shao Ping Wan
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Murphy, Bilak & Homiller, PLLC
- Main IPC: H01L23/495
- IPC: H01L23/495 ; H01L23/00

Abstract:
An embodiment of a semiconductor package includes a leadframe having leads, a mold compound partly encasing the leadframe so that the leads protrude from the mold compound, a power transistor die attached to the leadframe at a first side of the leadframe, and a driver die attached to the leadframe at a second side of the leadframe opposite the first side so that the power transistor die and the driver die are disposed in a stacked arrangement. The driver die is configured to control the power transistor die. The driver die is in direct electrical communication with the power transistor die only through the leadframe and any interconnects which attach the power transistor die and the driver die to the leadframe. Corresponding methods of manufacturing the semiconductor package are also described.
Public/Granted literature
- US20210066172A1 Semiconductor Package with Leadframe Interconnection Structure Public/Granted day:2021-03-04
Information query
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