Invention Grant
- Patent Title: Wafer bonding method
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Application No.: US17019913Application Date: 2020-09-14
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Publication No.: US11437344B2Publication Date: 2022-09-06
- Inventor: Yung-Chi Lin , Tsang-Jiuh Wu , Wen-Chih Chiou , Chen-Hua Yu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L23/00 ; H01L21/3213 ; H01L25/00 ; B23K26/362

Abstract:
In an embodiment, a device includes: a first wafer including a first substrate and a first interconnect structure, a sidewall of the first interconnect structure forming an obtuse angle with a sidewall of the first substrate; and a second wafer bonded to the first wafer, the second wafer including a second substrate and a second interconnect structure, the sidewall of the first substrate being laterally offset from a sidewall of the second substrate and a sidewall of the second interconnect structure.
Public/Granted literature
- US20210305200A1 Wafer Bonding Method Public/Granted day:2021-09-30
Information query
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