Invention Grant
- Patent Title: Physically obfuscated circuit
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Application No.: US17004036Application Date: 2020-08-27
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Publication No.: US11437330B2Publication Date: 2022-09-06
- Inventor: Thomas Kuenemund
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Viering, Jentschura & Partner mbB
- Priority: DE102019123555.3 20190903
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L27/092

Abstract:
A physically obfuscated circuit (POC) circuit including a plurality of subcircuits, each comprising at least one p-channel field effect transistor (FET) and at least one n-channel FET, connected such that the at least one n-channel FET, if supplied with an upper supply potential at its gate, supplies a lower supply potential to the gate of the at least one p-channel FET and the at least one p-channel FET, if supplied with the lower supply potential at its gate, supplies the upper supply potential to the gate of the at least one n-channel FET.
Public/Granted literature
- US20210066216A1 PHYSICALLY OBFUSCATED CIRCUIT Public/Granted day:2021-03-04
Information query
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