A clamp circuit including a power dissipation circuit having at least one transistor and a resistor which dissipates power from the surge across the resistor and the transistor by turning on the at least one transistor and forming a voltage divider between a source impedance and the resistor thereof disposed in series with a channel of the transistor; and the resistor holding a portion of transient pulse seen by the load to a low voltage and adding of the low voltage to a threshold voltage of the transistor; and a sub-circuit which tests a functionality of the power dissipation circuit.