Invention Grant
- Patent Title: Etching back and selective deposition of metal gate
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Application No.: US16685672Application Date: 2019-11-15
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Publication No.: US11380774B2Publication Date: 2022-07-05
- Inventor: Peng-Soon Lim , Cheng-Lung Hung , Mao-Lin Huang , Weng Chang
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/78 ; H01L29/423 ; H01L21/28 ; H01L29/49 ; H01L29/51 ; H01L29/06

Abstract:
A method includes forming a dummy gate stack, forming a dielectric layer, with the dummy gate stack located in the dielectric layer, removing the dummy gate stack to form a opening in the dielectric layer, forming a metal layer extending into the opening, and etching back the metal layer. The remaining portions of the metal layer in the opening have edges lower than a top surface of the dielectric layer. A conductive layer is selectively deposited in the opening. The conductive layer is over the metal layer, and the metal layer and the conductive layer in combination form a replacement gate.
Public/Granted literature
- US20200083351A1 Etching Back and Selective Deposition of Metal Gate Public/Granted day:2020-03-12
Information query
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