Invention Grant
- Patent Title: Low-voltage anti-fuse element
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Application No.: US16808505Application Date: 2020-03-04
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Publication No.: US11380694B2Publication Date: 2022-07-05
- Inventor: Cheng-Ying Wu , Yu-Ting Huang , Wen-Chien Huang
- Applicant: YIELD MICROELECTRONICS CORP.
- Applicant Address: TW Chu-Pei
- Assignee: YIELD MICROELECTRONICS CORP.
- Current Assignee: YIELD MICROELECTRONICS CORP.
- Current Assignee Address: TW Chu-Pei
- Agency: Rosenberg, Klein & Lee
- Priority: TW109103372 20200204
- Main IPC: H01L27/112
- IPC: H01L27/112

Abstract:
A low-voltage anti-fuse element is provided with a first gate dielectric layer and a first gate sequentially disposed on a substrate. A first ion-doped region is formed in the substrate on one side of the first gate. The first gate includes a body portion and a sharp corner portion extending and gradually reducing from one side of the body portion both adjacent to the first gate dielectric layer. During the operation, the principle of higher density of charges at sharp corners is utilized. When the write voltage is applied between the first gate and the first ion-doped region, a portion of the first gate dielectric layer below the sharp corner portion is liable to break down. Therefore, the breakdown voltage is reduced to achieve the purpose of reducing current consumption, while decreasing the gate area, the element size and production costs.
Public/Granted literature
- US20210242223A1 LOW-VOLTAGE ANTI-FUSE ELEMENT Public/Granted day:2021-08-05
Information query
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