Invention Grant
- Patent Title: Semiconductor wafer, method for separating the semiconductor wafer, semiconductor chip, and semiconductor package including the semiconductor chip
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Application No.: US17081796Application Date: 2020-10-27
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Publication No.: US11380595B2Publication Date: 2022-07-05
- Inventor: Hyun Chul Seo
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-si
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Icheon-si
- Agency: William Park & Associates Ltd.
- Priority: KR10-2020-0084701 20200709
- Main IPC: H01L21/78
- IPC: H01L21/78 ; H01L21/66 ; H01L23/31 ; H01L25/065 ; H01L23/29
Abstract:
A semiconductor wafer includes a first chip region and a second chip region spaced apart from each other by a scribe lane region. The semiconductor wafer also includes a test pad disposed in the scribe lane region. The semiconductor wafer additionally includes a protective layer partially covering the first chip region, the second chip region, and the scribe lane region, wherein the protective layer covers a portion of the test pad adjacent to the first chip region and leaves a remaining portion of the first test pad exposed.
Public/Granted literature
Information query
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