Invention Grant
- Patent Title: Analog vector-matrix multiplication circuit
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Application No.: US17163617Application Date: 2021-02-01
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Publication No.: US11379673B2Publication Date: 2022-07-05
- Inventor: Shaodi Wang
- Applicant: BELJING ZHICUN (WITIN) TECHNOLOGY CORPORATION LIMITED
- Applicant Address: CN Beijing
- Assignee: BELJING ZHICUN (WITIN) TECHNOLOGY CORPORATION LIMITED
- Current Assignee: BELJING ZHICUN (WITIN) TECHNOLOGY CORPORATION LIMITED
- Current Assignee Address: CN Beijing
- Priority: CN201810872120.9 20180802
- Main IPC: G06G7/16
- IPC: G06G7/16

Abstract:
An analog vector-matrix multiplication circuit is achieved by using a programmable storage device array. In a programmable semiconductor device array, gates of all of programmable semiconductor devices of each row are all connected to the same analog voltage input end. M rows of programmable semiconductor devices are correspondingly connected to M analog voltage input ends. Drains (or sources) of all of programmable semiconductor devices of each column are all connected to the same bias voltage input end. N columns of programmable semiconductor devices are correspondingly connected to N bias voltage input ends. Sources (or drains) of all of programmable semiconductor devices of each column are all connected to the same analog current output end. The N columns of programmable semiconductor devices are correspondingly connected to N analog current output ends. Threshold voltages of the programmable semiconductor devices are controlled, such that each programmable semiconductor device can be regarded as a variable equivalent analog weight, thereby achieving the matrix multiplication function.
Public/Granted literature
- US20210365646A1 ANALOG VECTOR-MATRIX MULTIPLICATION CIRCUIT Public/Granted day:2021-11-25
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