A method for manufacturing an electronic device includes the following steps. A substrate including a main region and a peripheral region is provided. A seed layer is formed on the substrate. A circuit structure layer is formed on the seed layer, and the circuit structure layer has a plurality of chip connection structures disposed on the main region and a plurality of test circuit structures disposed on the peripheral region. The chip connection structures and the test circuit structures are physically separated from each other, and the chip connection structures and the test circuit structures are electrically connected through the seed layer. A circuit test process is performed and includes applying a predetermined voltage to the test circuit structures to test the chip connection structures. A test result is obtained to determine whether a chip is electrically connected to the chip connection structures.