Invention Grant
- Patent Title: Silicon interposer including through-silicon via structures with enhanced overlay tolerance and methods of forming the same
-
Application No.: US16885384Application Date: 2020-05-28
-
Publication No.: US11296032B2Publication Date: 2022-04-05
- Inventor: Hsien-Ju Tsou , Chih-Wei Wu , Ying-Ching Shih , Szu-Wei Lu
- Applicant: Taiwan Semiconductor Manufacturing Company Limited
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee Address: TW Hsinchu
- Agency: The Marbury Law Group, PLLC
- Main IPC: H01L29/40
- IPC: H01L29/40 ; H01L23/538 ; H01L23/498 ; H01L23/00 ; H01L21/48

Abstract:
An array of through-silicon via (TSV) structures is formed through a silicon substrate, and package-side metal pads are formed on backside surfaces of the array of TSV structures. The silicon substrate is disposed over a carrier substrate, and an encapsulant interposer frame, such as an epoxy molding compound (EMC) interposer frame is formed around the silicon substrate. A die-side redistribution structure is formed over the silicon substrate and the EMC interposer frame, and at least one semiconductor die is attached to the die-side redistribution structure. The carrier substrate is removed from underneath the package-side metal pads. A package-side redistribution structure is formed on the package-side metal pads and on the EMC interposer frame. Overlay tolerance between the package-side redistribution wiring interconnects and the package-side metal pads increases due to increased areas of the package-side metal pads.
Public/Granted literature
Information query
IPC分类: