Invention Grant
- Patent Title: Integrated fan-out structure and method of forming
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Application No.: US16895531Application Date: 2020-06-08
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Publication No.: US11276656B2Publication Date: 2022-03-15
- Inventor: Hsien-Wei Chen , An-Jhih Su , Tsung-Shu Lin
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L23/00 ; H01L23/498 ; H01L23/538 ; H01L21/56 ; H01L23/31 ; H01L25/065 ; H01L25/10

Abstract:
Semiconductor devices and methods of forming are provided. A molding compound extends along sidewalls of a first die and a second die. A redistribution layer is formed over the first die, the second die, and the molding compound. The redistribution layer includes a conductor overlying a gap between the first die and the second die. The conductor is routed at a first angle over an edge of the first die. The first angle is measured with respect to a straight line that extends along a shortest between the first die and the second die, and the first angle is greater than 0.
Public/Granted literature
- US20200303332A1 Integrated Fan-Out Structure and Method of Forming Public/Granted day:2020-09-24
Information query
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