Invention Grant
- Patent Title: Top via on subtractively etched conductive line
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Application No.: US16821428Application Date: 2020-03-17
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Publication No.: US11276611B2Publication Date: 2022-03-15
- Inventor: Brent Anderson , Lawrence A. Clevenger , Kisik Choi , Nicholas Anthony Lanzillo , Christopher J. Penny , Robert Robison
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Tutunjian & Bitetto, P.C.
- Agent Randall Bluestone
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L21/02 ; H01L21/04 ; H01L21/3105

Abstract:
A method for fabricating a semiconductor device including a self-aligned top via includes subtractively etching a conductive layer to form at least a first conductive line on a substrate. After the subtractive etching, the method further includes forming a barrier layer along the substate and along the first conductive line, planarizing at least portions of the barrier layer to obtain at least an exposed first conductive line, recessing at least the exposed first conductive line to form a first recessed conductive line, and forming conductive material in a via opening on the first recessed conductive line.
Public/Granted literature
- US20210296171A1 TOP VIA ON SUBTRACTIVELY ETCHED CONDUCTIVE LINE Public/Granted day:2021-09-23
Information query
IPC分类: