Invention Grant
- Patent Title: Semiconductor structure and forming method thereof
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Application No.: US16863343Application Date: 2020-04-30
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Publication No.: US11276608B2Publication Date: 2022-03-15
- Inventor: Wang Wei , Su Bo , Hu You Cun
- Applicant: Semiconductor Manufacturing International (Shanghai) Corporation , Semiconductor Manufacturing International (Beijing) Corporation
- Applicant Address: CN Shanghai; CN Beijing
- Assignee: Semiconductor Manufacturing International (Shanghai) Corporation,Semiconductor Manufacturing International (Beijing) Corporation
- Current Assignee: Semiconductor Manufacturing International (Shanghai) Corporation,Semiconductor Manufacturing International (Beijing) Corporation
- Current Assignee Address: CN Shanghai; CN Beijing
- Agency: Crowell & Moring LLP
- Priority: CN201911072603.1 20191105
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/532 ; H01L21/311

Abstract:
A semiconductor structure and a forming method thereof are provided. The forming method includes: providing a base, where a mask material layer is formed on the base, a plurality of first trenches disposed at intervals are formed in the mask material layer, an extension direction of the first trenches is a first direction, the plurality of first trenches are arranged in parallel along a second direction, and the second direction is perpendicular to the first direction; forming a first side wall covering layer and a barrier layer, where the first side wall covering layer is located on a side wall of the first trench, the barrier layer is located in at least one of the first trenches, the barrier layer divides the first trench in the first direction, and the first side wall covering layer exposes side walls of the barrier layer on two sides in the first direction; forming a second side wall covering layer on the side walls of the barrier layer exposed by the first side wall covering layer; and etching the mask material layer between the adjacent first trenches by using the first side wall covering layer, the second side wall covering layer and the barrier layer as a mask to form a second trench, where the second trench is isolated from the first trench by the first side wall covering layer. According to the present disclosure, the barrier layer is protected by the second side wall covering layer, thereby improving the accuracy of pattern transfer.
Public/Granted literature
- US20210134659A1 SEMICONDUCTOR STRUCTURE AND FORMING METHOD THEREOF Public/Granted day:2021-05-06
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