Invention Grant
- Patent Title: Hardware simulation systems and methods for reducing signal dumping time and size by fast dynamical partial aliasing of signals having similar waveform
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Application No.: US16586829Application Date: 2019-09-27
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Publication No.: US11275877B2Publication Date: 2022-03-15
- Inventor: Parijat Biswas , Sitikant Sahu , Rahul Garg
- Applicant: Synopsys, Inc.
- Applicant Address: US CA Mountain View
- Assignee: Synopsys, Inc.
- Current Assignee: Synopsys, Inc.
- Current Assignee Address: US CA Mountain View
- Agency: Weaver Austin Villeneuve & Sampson LLP
- Priority: IN201811036396 20180927
- Main IPC: G06F30/20
- IPC: G06F30/20 ; H04L9/06 ; G06F11/07 ; G06F30/30

Abstract:
Hardware simulation systems and methods for reducing signal dumping time and size of by fast dynamical partial aliasing of signals having similar waveform are provided. One example system is configured to receive, in real-time, a first signal from a producer entity; determine a first signal signature associated with the first signal; determine, in real-time, a second signal signature associated with the second signal; upon determining that the first signal signature matches the second signal signature, designate the first signal as a master signal and designate the second signal as a slave signal; and stop dumping the second signal to a storage space.
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