In an embodiment, a method for processing data in a single instruction multiple data (SIMD) computer architecture is provided. A processing element (PE) may determine based on a masking instruction, a predication state indicative of one of a conditional predication mode and an absolute predication mode. The PE may receive a predicated instruction and, based on a value of a head bit of the bits of a predication mask and on the value indicative of the predication state whether to commit a computation corresponding to execution of the predicated instruction. In another embodiment, a SIMD controller stores loops and sections of a program as a separate instruction stream record for generating the memory address of the next instruction. For data streams, the SIMD controller records information for each data memory access that references the same register files that are used by the instruction streams.