To prevent an output of an intermediate potential by suppressing sneaking of a current from a signal line to a power line at the time of disconnection of a power supply. A control circuit which receives a power supply voltage from a power line L11 and outputs an output signal to a signal line L12 includes: a load R11 which is provided between the power line and the signal line; a first transistor P11 which is provided between the load and the signal line; a second transistor P12 which is provided between a well of the first transistor and the power line; and a gate control circuit 15 which connects a gate terminal of the first transistor and a gate terminal of the second transistor to the signal line and turns off the first transistor and the second transistor, at the time of disconnection of a power supply.