Invention Grant
- Patent Title: Memory readout circuit and method
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Application No.: US17028837Application Date: 2020-09-22
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Publication No.: US11270780B2Publication Date: 2022-03-08
- Inventor: Chih-Min Liu
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Hauptman Ham, LLP
- Main IPC: G11C17/18
- IPC: G11C17/18 ; G11C17/16 ; G11C11/16

Abstract:
A circuit includes an OTP cell, an NVM cell, and a bit line coupled to the OTP cell, the NVM cell, and a first input terminal of an amplifier. The amplifier is configured to generate an output voltage based on a signal on the bit line, an ADC is configured to generate a digital output signal based on the output voltage, and a comparator includes a first input port coupled to an output port of the ADC and is configured to output a data bit responsive to a comparison of the digital output signal to a threshold level received at a second input port.
Public/Granted literature
- US20210304832A1 MEMORY READOUT CIRCUIT AND METHOD Public/Granted day:2021-09-30
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