Invention Grant
- Patent Title: Method of manufacturing semiconductor device
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Application No.: US16793573Application Date: 2020-02-18
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Publication No.: US11264244B2Publication Date: 2022-03-01
- Inventor: Tatsuyoshi Mihara
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Main IPC: H01L21/285
- IPC: H01L21/285 ; H01L27/12 ; H01L29/45 ; H01L29/78 ; H01L29/66 ; H01L21/84 ; H01L21/311 ; H01L21/762 ; H01L21/768
Abstract:
After a MISFET is formed on a substrate including a semiconductor substrate, an insulating layer and a semiconductor layer, an interlayer insulating film and a first insulating film are formed on the substrate. Also, after an opening is formed in each of the first insulating film and the interlayer insulating film, a second insulating film is formed at each of a bottom portion of the opening and a side surface of the opening and also formed on an upper surface of the first insulating film. Further, each of the second insulating film formed at the bottom portion of the opening and the second insulating film formed on the upper surface of the first insulating film is removed by etching. After that, an inside of the opening is etched under a condition that each of the first insulating film and the second insulating film is less etched than the insulating layer.
Public/Granted literature
- US20210257217A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2021-08-19
Information query
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