According to one embodiment, a semiconductor memory device includes first and second memory cells, first and second word lines, and a bit line. The first and second memory cells are coupled to each other and adjacent to each other. When a state of the second memory cell is the first state or one of the states corresponding to a lower threshold voltage distribution than that of the first state, the first memory cell data is read in a first period during which a first voltage is applied to the second word line. And when the state of the second memory cell is the second state or one of the states corresponding to a higher threshold voltage distribution than the second state, the first memory cell data is read in a second period during which a second voltage higher than the first voltage is applied to the second word line.