A memory system includes a status information register configured for checking threshold voltages of select transistors included in memory blocks, storing status information on a check result, and outputting a code based on the status information, a status monitor configured to receive the code from the status information register, determine a number of select transistors that have shifted according to the code, and output status signal based on the number of the select transistors that have shifted, and a central processing unit configured for outputting a setup command set for setting parameters of the memory blocks, outputting a re-program command set for re-programming the select transistors, or outputting a bad block address for processing the memory blocks as bad blocks in response to the status signals.