Invention Grant
- Patent Title: Molded semiconductor package and related methods
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Application No.: US15679666Application Date: 2017-08-17
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Publication No.: US11244918B2Publication Date: 2022-02-08
- Inventor: Sw Wang , CH Chew , Eiji Kurose , How Kiat Liew
- Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Applicant Address: US AZ Phoenix
- Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Current Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Current Assignee Address: US AZ Phoenix
- Agency: Adam R. Stephenson, Ltd.
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/31 ; H01L21/56

Abstract:
Implementations of semiconductor packages may include: a semiconductor die having a first side and a second side; one or more bumps included on the first side of the wafer, the bumps comprising a first layer having a first metal and a second layer including a second metal. The first layer may have a first thickness and the second layer may have a second thickness. The semiconductor package may also have a mold compound encapsulating all the semiconductor die except for a face of the one or more bumps.
Public/Granted literature
- US20190057947A1 MOLDED SEMICONDUCTOR PACKAGE AND RELATED METHODS Public/Granted day:2019-02-21
Information query
IPC分类: