Invention Grant
- Patent Title: Interconnects having a via-to-line spacer for preventing short circuit events between a conductive via and an adjacent line
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Application No.: US16597966Application Date: 2019-10-10
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Publication No.: US11244859B2Publication Date: 2022-02-08
- Inventor: Koichi Motoyama , Cornelius Brown Peethala , Christopher J. Penny , Nicholas Anthony Lanzillo , Lawrence A. Clevenger
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Randall Bluestone
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/522 ; H01L23/528 ; H01L23/532

Abstract:
Embodiments of the present invention are directed to fabrication method and resulting structures for forming interconnects using a conductive spacer configured to prevent a short between a via and an adjacent line. In a non-limiting embodiment of the invention, a first conductive line and a second conductive line are formed in a metallization layer. A conductive spacer is formed on the first conductive line and a conductive via is formed on a surface of the conductive spacer. The conductive via is positioned such that the conductive spacer is between the first conductive line and the conductive via. A height of the conductive spacer is selected to provide a predetermined distance from the conductive via to the second conductive line. The predetermined distance from the conductive via to the second conductive line is sufficient to prevent a short between the conductive via and the second conductive line.
Public/Granted literature
Information query
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