Invention Grant
- Patent Title: External memory based translation lookaside buffer
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Application No.: US16141603Application Date: 2018-09-25
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Publication No.: US11243891B2Publication Date: 2022-02-08
- Inventor: Nippon Harshadk Raval , Philip Ng
- Applicant: ATI Technologies ULC
- Applicant Address: CA Markham
- Assignee: ATI Technologies ULC
- Current Assignee: ATI Technologies ULC
- Current Assignee Address: CA Markham
- Agency: Volpe Koenig
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F12/1045

Abstract:
Methods, devices, and systems for virtual address translation. A memory management unit (MMU) receives a request to translate a virtual memory address to a physical memory address and searching a translation lookaside buffer (TLB) for a translation to the physical memory address based on the virtual memory address. If the translation is not found in the TLB, the MMU searches an external memory translation lookaside buffer (EMTLB) for the physical memory address and performs a page table walk, using a page table walker (PTW), to retrieve the translation. If the translation is found in the EMTLB, the MMU aborts the page table walk and returns the physical memory address. If the translation is not found in the TLB and not found in the EMTLB, the MMU returns the physical memory address based on the page table walk.
Public/Granted literature
- US20200097413A1 EXTERNAL MEMORY BASED TRANSLATION LOOKASIDE BUFFER Public/Granted day:2020-03-26
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