Invention Grant
- Patent Title: Calibration of digital-to-analog converter with low pin count
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Application No.: US16943156Application Date: 2020-07-30
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Publication No.: US11239857B2Publication Date: 2022-02-01
- Inventor: John L. Melanson
- Applicant: Cirrus Logic International Semiconductor Ltd.
- Applicant Address: GB Edinburgh
- Assignee: Cirrus Logic International Semiconductor Ltd.
- Current Assignee: Cirrus Logic International Semiconductor Ltd.
- Current Assignee Address: GB Edinburgh
- Agency: Jackson Walker L.L.P.
- Main IPC: H03M1/10
- IPC: H03M1/10 ; H03M3/00 ; H04R3/00

Abstract:
An open-loop digital-to-analog converter (DAC) circuit may include a delta-sigma modulator, a decode block responsive to the delta-sigma modulator configured to perform a DAC decode operation, a plurality of DAC elements responsive to the DAC decode operation, an analog output driver responsive to the plurality of DAC elements, a test signal generator configured to generate a test signal that is responsive to inputs of the plurality of DAC elements, and a synchronizer configured to enable replication of the test signal at an external test system coupled to the open-loop DAC circuit in order to generate a matching test signal at the external test system that matches the test signal generated by the test signal generator.
Public/Granted literature
- US20210175898A1 CALIBRATION OF DIGITAL-TO-ANALOG CONVERTER WITH LOW PIN COUNT Public/Granted day:2021-06-10
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