Invention Grant
- Patent Title: Semiconductor device with a LOCOS trench
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Application No.: US16615502Application Date: 2018-01-04
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Publication No.: US11239351B2Publication Date: 2022-02-01
- Inventor: Luther-King Ngwendson , Ian Deviny , John Hutchings
- Applicant: Dynex Semiconductor Limited , Zhuzhou CRRC Times Electric Co. Ltd.
- Applicant Address: GB Lincolnshire; CN Hunan
- Assignee: Dynex Semiconductor Limited,Zhuzhou CRRC Times Electric Co. Ltd.
- Current Assignee: Dynex Semiconductor Limited,Zhuzhou CRRC Times Electric Co. Ltd.
- Current Assignee Address: GB Lincolnshire; CN Hunan
- Agency: Tarolli, Sundheim, Covell & Tummino LLP
- Priority: WOPCT/GB2017/051492 20170525
- International Application: PCT/GB2018/050012 WO 20180104
- International Announcement: WO2018/215729 WO 20181129
- Main IPC: H01L29/739
- IPC: H01L29/739 ; H01L21/762 ; H01L29/66 ; H01L29/06 ; H01L29/08 ; H01L29/10

Abstract:
A gate controlled semiconductor device comprising a collector region of a first conductivity type; a drift region of a second conductivity type located over the collector region; a body region of a first conductivity type located over the drift region; at least one first contact region of a second conductivity type located above the body region and having a higher doping concentration compared to the body region. The device further comprises at least one second contact region of a first conductivity type located laterally adjacent to the at least one first contact region, the at least one second contact region having a higher doping concentration than the body region. The device further comprises at least one active trench extending from a surface into the drift region, in which the at least one first contact region adjoins the at least one active trench so that, in use, a channel region is formed along said at least one active trench and within the body region. The at least one active trench comprises: two vertical sidewalls and a bottom surface between the two vertical sidewalls; and an insulation layer along the vertical side walls and the bottom surface, wherein the insulation layer along at least one vertical side wall comprises different thicknesses; at least one auxiliary trench extending from the surface into the drift region. The at least one auxiliary trench comprises: two vertical sidewalls and a bottom surface between the two vertical sidewalls; and an insulation layer along the vertical side walls and the bottom surface, wherein the insulation layer along at least one vertical side wall comprises a constant thickness.
Public/Granted literature
- US20200091328A1 A SEMICONDUCTOR DEVICE WITH A LOCOS TRENCH Public/Granted day:2020-03-19
Information query
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