Invention Grant
- Patent Title: Isolation features and methods of fabricating the same
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Application No.: US16704138Application Date: 2019-12-05
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Publication No.: US11239309B2Publication Date: 2022-02-01
- Inventor: I-Wen Wu , Fu-Kai Yang , Chen-Ming B. Lee , Mei-Yun Wang , Jr-Hung Li , Bo-Cyuan Lu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L27/088 ; H01L29/78 ; H01L21/8234 ; H01L21/3105 ; H01L21/02 ; H01L21/762 ; H01L21/32

Abstract:
Semiconductor devices and methods of fabricating semiconductor devices are provided. The present disclosure provides a semiconductor device that includes a first fin structure and a second fin structure each extending from a substrate; a first gate segment over the first fin structure and a second gate segment over the second fin structure; a first isolation feature separating the first and second gate segments; a first source/drain (S/D) feature over the first fin structure and adjacent to the first gate segment; a second S/D feature over the second fin structure and adjacent to the second gate segment; and a second isolation feature also disposed in the trench. The first and second S/D features are separated by the second isolation feature, and a composition of the second isolation feature is different from a composition of the first isolation feature.
Information query
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