Resistive random access memory cells integrated with shared-gate vertical field effect transistors
Abstract:
A two-transistor-two-resistor (2T2R) resistive random access memory (ReRAM) structure, and a method for forming the same includes two vertical field effect transistors (VFETs) formed on a substrate, each VFET includes an epitaxial region located above a channel region and below a dielectric cap. The epitaxial region includes two opposing protruding regions of triangular shape that extend horizontally beyond the channel region. A metal gate material is disposed on and around the channel region. A portion of the metal gate material is located between the two VFETs. A ReRAM stack is deposited within two openings adjacent to a side of each VFET that is opposing the portion of the metal gate material located between the two VFETs. A portion of the epitaxial region in direct contact with the ReRAM stack acts as a bottom electrode for the ReRAM structure.
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