Invention Grant
- Patent Title: Resistive random access memory cells integrated with shared-gate vertical field effect transistors
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Application No.: US16723125Application Date: 2019-12-20
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Publication No.: US11222922B2Publication Date: 2022-01-11
- Inventor: Alexander Reznicek , Bahman Hekmatshoartabari , Takashi Ando
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Michael A. Petrocelli
- Main IPC: H01L27/24
- IPC: H01L27/24 ; H01L45/00

Abstract:
A two-transistor-two-resistor (2T2R) resistive random access memory (ReRAM) structure, and a method for forming the same includes two vertical field effect transistors (VFETs) formed on a substrate, each VFET includes an epitaxial region located above a channel region and below a dielectric cap. The epitaxial region includes two opposing protruding regions of triangular shape that extend horizontally beyond the channel region. A metal gate material is disposed on and around the channel region. A portion of the metal gate material is located between the two VFETs. A ReRAM stack is deposited within two openings adjacent to a side of each VFET that is opposing the portion of the metal gate material located between the two VFETs. A portion of the epitaxial region in direct contact with the ReRAM stack acts as a bottom electrode for the ReRAM structure.
Public/Granted literature
- US20210193737A1 RESISTIVE RANDOM ACCESS MEMORY CELLS INTEGRATED WITH SHARED-GATE VERTICAL FIELD EFFECT TRANSISTORS Public/Granted day:2021-06-24
Information query
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