Invention Grant
- Patent Title: Semiconductor package including stacked semiconductor chips
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Application No.: US16867348Application Date: 2020-05-05
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Publication No.: US11222872B2Publication Date: 2022-01-11
- Inventor: Chae-Sung Lee , Bok-Kyu Choi
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-si
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Icheon-si
- Agency: William Park & Associates Ltd.
- Priority: KR10-2019-0110687 20190906
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L25/00

Abstract:
A semiconductor package may include: a first chip stack including a plurality of first semiconductor chips stacked in a vertical direction; and first vertical interconnectors electrically coupled to the plurality of first semiconductor chips, respectively, and extended in the vertical direction, wherein each of the other first semiconductor chips, except at least the uppermost first semiconductor chip from among the plurality of first semiconductor chips includes: an active surface defined by two side surfaces of the first semiconductor chip in a first direction and two side surfaces of the first semiconductor chip in a second direction crossing the first direction; a first one-side chip pad disposed at an edge of the active surface, which is close to one side surface in the first direction; a first other-side chip pad disposed at an edge of the active surface, which is close to an other side surface in the first direction; and a first redistribution pad electrically coupled to the first other-side chip pad, and disposed at an edge of the active surface, which is close to one side surface in the second direction, wherein the plurality of first semiconductor chips are stacked with an offset toward one side in a third direction crossing the first and second directions, the one side being away from the one side surface in the first direction and the one side surface in the second direction, in order to expose the first one-side chip pads and the first redistribution pads, wherein the first vertical interconnectors electrically coupled to the first semiconductor chips have one ends connected to the first one-side chip pads and the first redistribution pads, respectively.
Public/Granted literature
- US20210074679A1 SEMICONDUCTOR PACKAGE INCLUDING STACKED SEMICONDUCTOR CHIPS Public/Granted day:2021-03-11
Information query
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