The present disclosure provides a semiconductor device with a porous dielectric structure for reducing capacitive coupling between conductive features. The semiconductor device includes a substrate; a gate structure positioned above the substrate; two source/drain regions positioned adjacent to two sides of the gate structure; two porous spacers positioned between the source/drain regions and the gate structure, wherein a porosity of the two porous spacers is between about 25% and about 100%; a porous capping layer positioned on the gate structure and between the two porous spacers, wherein a porosity of the porous capping layer is between about 25% and about 100%; and an insulating layer disposed over the two porous spacers and the porous capping layer.