Invention Grant
- Patent Title: Bond pad structure with reduced step height and increased electrical isolation
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Application No.: US16558556Application Date: 2019-09-03
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Publication No.: US11217547B2Publication Date: 2022-01-04
- Inventor: Shih-Pei Chou , Jiech-Fun Lu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L27/146 ; H01L27/142

Abstract:
Various embodiments of the present disclosure are directed towards a semiconductor structure including a bond pad disposed within a semiconductor substrate. The semiconductor substrate has a back-side surface and a front-side surface opposite the back-side surface. An upper surface of the semiconductor substrate is vertically below the back-side surface. The bond pad extends through the semiconductor substrate. The bond pad includes a conductive body over the upper surface of the semiconductor substrate and conductive protrusions extending from above the upper surface to below the front-side surface of the semiconductor substrate. A vertical distance between a top surface of the bond pad and the back-side surface of the semiconductor substrate is less than a height of the conductive protrusions. A first bond pad isolation structure extends through the semiconductor substrate and laterally surrounds the conductive protrusions.
Public/Granted literature
- US20210066225A1 BOND PAD STRUCTURE WITH REDUCED STEP HEIGHT AND INCREASED ELECTRICAL ISOLATION Public/Granted day:2021-03-04
Information query
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