Invention Grant
- Patent Title: Lead structure of circuit with increased gaps between adjacent leads
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Application No.: US16161318Application Date: 2018-10-16
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Publication No.: US11217508B2Publication Date: 2022-01-04
- Inventor: Kuo-Wei Tseng , Po-Chi Chen , Jui-Hsuan Cheng
- Applicant: Sitronix Technology Corp
- Applicant Address: TW Jhubei
- Assignee: Sitronix Technology Corp
- Current Assignee: Sitronix Technology Corp
- Current Assignee Address: TW Jhubei
- Agency: Rosenberg, Klein & Lee
- Main IPC: H01L23/495
- IPC: H01L23/495 ; H01L23/00 ; H01L23/498 ; H01L23/60
Abstract:
The present invention discloses a lead structure of the circuit, which comprises a first lead and a second lead. The first lead includes a first bump connecting part and a first lead segment. The first lead segment is connected to the first bump connecting part. The width of the first lead segment is smaller than the width of the first bump connecting part. The second lead is adjacent to the first lead and there is a lead gap therebetween. The second lead also includes a second bump connecting part and a first lead segment. The first lead segment of the second lead is connected to the second bump connecting part. The second bump connecting part and the first bump connecting part are arranged staggeredly. The second bump connecting part is adjacent to the first lead segment of the first lead.
Public/Granted literature
- US20190115285A1 LEAD STRUCTURE OF CIRCUIT Public/Granted day:2019-04-18
Information query
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