Invention Grant
- Patent Title: Hybrid cache memory and method for controlling the same
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Application No.: US16571210Application Date: 2019-09-16
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Publication No.: US11216387B2Publication Date: 2022-01-04
- Inventor: Shih-Lien Linus Lu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: G06F12/123
- IPC: G06F12/123 ; G06F12/0891 ; G06F12/0877 ; G06F12/0895 ; G06F12/0811

Abstract:
A hybrid cache memory and a method for controlling the same are provided. The method for controlling a cache includes: receiving a request for data; determining whether the requested data is present in a first portion of the cache, a second portion of cache, or not in the cache, wherein the first portion of cache has a smaller access latency than the second portion of cache; loading the requested data from a memory of a next level into the first portion of the cache and the second portion of the cache if the requested data is not in the cache, and retrieving the requested data from the first portion of the cache; and retrieving the requested data from the first portion of the cache or the second portion of the cache without writing data to the second portion of the cache if the requested data is in the cache.
Public/Granted literature
- US20210081331A1 HYBRID CACHE MEMORY AND METHOD FOR CONTROLLING THE SAME Public/Granted day:2021-03-18
Information query
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